Faculty/Staff Daily Digest

11:15 am in ITE 336

Yale University

Abstract: Neuromorphic systems have two appealing characteristics as a
computational platform: (i) they are inherently parallel; and (ii) we
have Biological evidence that systems inspired by nature have excellent
performance. I will discuss why asynchronous logic is a natural choice
for achieving energy-efficiency in neuromorphic systems---which is why
is is found in state-of-the-art neuromorphic platforms.

I will present some of the major tradeoffs in the design of large-scale
neuromorphic computing systems, and how they impact both hardware and
software. Many design choices that have significant impact on overall
system energy efficiency depend strongly on the neural networks being
mapped to the hardware. This requires having a platform that enables the
co-design of algorithms and neuromorphic hardware.

I will describe ongoing work on creating a quantitative, full-stack
approach to evaluating these trade-offs in neuromorphic system design.
This work is enabled by recently developed open-source tools for the
design and implementation of asynchronous digital systems.

Short Bio: Rajit Manohar is the John C. Malone Professor of Electrical
Engineering and Professor of Computer Science at Yale. He received his
B.S. (1994), M.S. (1995), and Ph.D. (1998) from Caltech. He has been on
the Yale faculty since 2017, where his group conducts research on the
design, analysis, and implementation of self-timed systems. He is the
recipient of twelve best paper awards, nine teaching awards, and was
named to MIT technology review's top 35 young innovators under 35 for
contributions to low power microprocessor design. His work includes the
design and implementation of a number of self-timed VLSI chips including
the first high-performance asynchronous microprocessor, the first
microprocessor for sensor networks, the first asynchronous dataflow
FPGA, the first radiation hardened SRAM-based FPGA, and the first
deterministic large-scale neuromorphic architecture. Most recently, his
group developed the first true ASIC flow for asynchronous circuits.